Scanner::Verilog - makepp scanner for Verilog files

Scans a verilog file for `include's and instances.

Tags are:

vinc

File scanned due to an `include directive or specified on the command line.

vlog

File scanned due to a requested instance.

vlib

File scanned due to a -v option.

I'm not sure whether a module that is defined by a file `include'ed by a -v file has its instances resolved immediately (the current scanner implementation), or whether it's deferred. In the latter case, we would need to add a new "vlibinc" tag to model this. On the other hand, this is a pretty weird case that probably never occurs in practice, and arguably you deserve what you get if you do it.